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TranslationMobile

數(shù)組結(jié)構(gòu)
陣列結(jié)構(gòu)

"array" in Chinese : vt. 1.打扮，裝飾。 2.使…列隊(duì)，排列。 3.提出 ...
"architecture" in Chinese : n. 1.建筑學(xué)。 2.建筑(樣式、風(fēng)格)；建筑物。 3 ...
"architecture" in Chinese : n. 1.建筑學(xué)。 2.建筑(樣式、風(fēng)格)；建筑物。 3.構(gòu)造，結(jié)構(gòu)；【自動(dòng) ...
"and array" in Chinese : 與陣列
"array" in Chinese : vt. 1.打扮，裝飾。 2.使…列隊(duì)，排列。 3.提出(陪審官)名單，使( ...
"in the array" in Chinese : 存于數(shù)列里
"array-array operation" in Chinese : 數(shù)列間運(yùn)算, 數(shù)組-數(shù)組運(yùn)算
"academy of architecture" in Chinese : 建筑學(xué)會(huì)
"adam architecture" in Chinese : 亞當(dāng)式建筑
"advanced architecture" in Chinese : 現(xiàn)代建筑學(xué)
"agent architecture" in Chinese : 主體體系結(jié)構(gòu)
"alu architecture" in Chinese : 算術(shù)邏輯單位結(jié)構(gòu)
"aluminium and architecture" in Chinese : 鋁與建筑
"aluminum architecture" in Chinese : 鋁建筑學(xué)
"american architecture" in Chinese : 美國(guó)建筑

Examples

Improve on algorithms can enhance encoding / decoding performance . with pipeline and systolic array architectures adopted in the hardware implements , encoder / decoder based on fpga can work better
對(duì)編譯碼算法的改進(jìn)有助于提高rs編譯碼器的性能，而利用fpga來(lái)實(shí)現(xiàn)rs編譯碼器，并采用流水線、心縮式陣列等優(yōu)化結(jié)構(gòu)，更能提高編譯碼器的性能。
Redundant disk arrays are a popular method to improve the reliability and performance of disk storage and an ever - increasing number of array architectures and data layouts are being proposed to balance cost , performance , and reliability
冗余磁盤陣列作為一種提高存儲(chǔ)系統(tǒng)可靠性和性能的技術(shù),已經(jīng)得到了廣泛的應(yīng)用。有關(guān)磁盤陣列結(jié)構(gòu)和數(shù)據(jù)布局的研究也一直比較活躍。
First , the low testing power dft solution - - scan array architecture are presented . in the scan array , the inserted wrapper and paralleled leaf scan chain reduce the testing power as low as the power dissipation in the normal working mode
首先，從優(yōu)化測(cè)試功耗的角度出發(fā)提出了掃描陣列結(jié)構(gòu)，通過(guò)加入wrapper測(cè)試控制結(jié)構(gòu)以及構(gòu)建并行化的分支掃描鏈，有效地將測(cè)試功耗降低到與正常工作功耗相當(dāng)?shù)牧考?jí)。
A novel flash memory , which uses the source induced band - to - band tunneling hot electron ( sibe ) injection to perform programming , and a pmos selected divided bit - line nor ( pnor ) array architecture are originally introduced in this dissertation
本論文首次提出了一種采用源極誘導(dǎo)帶帶隧穿熱電子注入( sourceinducedband - to - bandtunnelinghotelectroninjection )進(jìn)行編程操作的新型快閃存儲(chǔ)器技術(shù)和一種pmos選擇分裂位線nor ( pmosselecteddividedbit - linenor )快閃存貯陣列結(jié)構(gòu)。